1. Field of the Invention
This invention relates to semiconductor chip mounting methods for mounting semiconductor chips such as IC chips on boards (or substrates). This application is based on patent application No. Hei 8-291164 and patent application No. Hei 8-297744 both filed in Japan, the contents of which are incorporated herein by reference.
2. Prior Art
The conventional technology of the semiconductor chip mounting method uses the face-down bonding technique to mount a semiconductor chip on a substrate. Examples of the semiconductor chips to be mounted on the substrate are shown in FIGS. 11 and 12.
In FIG. 11, an insulating film 2 made of material such as silicon oxide is formed on a main surface of a semiconductor chip 1. On the insulating film 2, an electrode 3 is formed to contain a WSi layer 3a and an Al layer 3b,where `WSi` stands for tungsten silicide while `Al` stands for aluminum. The electrode 3 is covered with an insulating film 4 such as silicon nitride. In addition, an insulating film 5 such as silicon oxide is formed on the insulating film 4. Through the lamination of the insulating films 4 and 5, a contact hole P is formed to match with a part of the electrode 3. An Au bump 6 (where `Au` stands for gold) is formed inside of the contact hole P on the electrode 3. Herein, the Au bump 6 is formed in a two-stage structure by using an Au wire bonder.
Now, mounting (or packaging) is carried out by turning over the semiconductor chip 1 to direct the Au bump 6 downwardly. Herein, the face-down bonding technique is effected such that the Au bump 6 of the semiconductor chip 1 is securely fixed to a wiring layer of a substrate (not shown) by adhesive.
Similar to the semiconductor chip of FIG. 11, the semiconductor chip 1 of FIG. 12 is formed such that the electrode 3 and the insulating films 4, 5 are sequentially formed on the insulating film 2. In FIG. 12, a contact hole is formed through the lamination of the insulating films 4 and 5 to match with a part of the electrode 3. Then, a Ti film 7a and a Ni film 7b (where Ti stands for titanium while Ni stands for nickel) are sequentially formed to cover the contact hole and insulating film 5. Thereafter, a photolithography process and a selective etching process are effected to perform patterning on the lamination of the films 7a and 7b. Thus, a barrier layer 7 is formed using remaining parts of the films 7a and 7b which remain in the contact hole and its peripheral portion. Thereafter, an Au bump 8 is formed on the barrier layer 7 to project upwardly from the contact hole. The Au bump 8 is formed by the selective Au plating process in which resist is used as mask, for example. In addition, the Au bump 8 has a size roughly defined by a rectangular area of 20 .mu.m.times.20 .mu.m and a height of 20 .mu.m.
At mounting, the semiconductor chip 1 of FIG. 12 is turned over to direct the Au bump 8 downwardly. Then, the face-down bonding technique is performed such that the Au bump 8 is securely fixed to a wiring layer of a substrate (not shown) by solder or conductive adhesive.
According to the method which is described in conjunction with FIG. 11, the wire bonder is used to form the Au bump 6 having the two-stage structure. For this reason, the electrode 3 requires at least an area of 70 .mu.m.times.70 .mu.m or so. This raises a disadvantage that reduction of size of the electrode (and therefore reduction of size of the chip) should be limited.
According to the method which is described in conjunction with FIG. 12, it is possible to form the Au bump 8 in a considerably small size. However, this method requires complicated processes (or steps) which are troublesome in manufacturing. In addition, this method requires Au plating which is expensive in cost.